Simultaneous Sampling with Variable Gains
Some applications demand true simultaneous sampling across multiple channels. On the PCI bus, UEI offers the most power. True, you can find PCI boards with several A/Ds or purchase external SSH units. In contrast, we pack our SSH boards with as many as eight sample/hold amps. That fact means that you can sample each channel at a different gain and set its input range independent of the others. Nobody else offers this level of flexibility on a PCI-bus board along with the tight timing possible only with onboard solutions and without the expense of external accessories.
High-Density Models
In many systems, the number of slots available for I/O cards is limited. We recognize this fact and have designed models of our various card families with unusually high densities. In fact, we believe that in some cases you won’t find this many channels on any competitive products. For instance, can you find 96 independent D/A converters on one PCI card anywhere else? We doubt it! And how about 128 digital I/O points on a card. As an aside, note that a special model of our digital I/O cards can sink as much as 90 mA per channel – far beyond the 20 mA that’s typical for this class of card.
Ultra-Low-Noise PC-Board Design
To achieve the level of performance just mentioned, we’ve also taken great pains during board layout. We started with top-quality components and worked closely with the engineering departments of chip vendors to learn about the tricks and techniques not listed in any app notes or data sheets. We paid special attention to the placement of each device on a 6-layer board that separates analog and digital lines with power and ground planes. To even further reduce digital noise, we chose to operate the DSP and high-speed logic at 3.3V.
Advanced Circular Buffer
Modern drivers for data-acq boards eliminate many low-level jobs you had to perform in the DOS days to collect data. Today, for instance, one or two commands generally suffice to digitize a waveform and store results to a buffer in system RAM. Note, though, that with most drivers you have no access to any of the data until the buffer is completely full and the driver releases it to the application. Large buffers increase efficiency of data-transfer across the system bus, but the tradeoff is longer waiting time to access each point. \r With extensive experience developing Windows drivers, UEI’s software engineers designed a driver mechanism that provides optimal performance yet gives an application immediate access to any data in the buffer. There’s no longer any need for the application to wait for the buffer to fill. And to let your application know the moment new datapoints are ready for analysis and plotting, the driver’s event-notification mechanism tells you that it’s moved a scan or frame of data into the buffer. Now real-time plots update faster and smoother than ever before and real-time analysis routines can actually run in real time.
Continuous Gap-Free Streaming to Disk
There are boards with fast A/D’s available. Not only can we give you a fast A/D, but the PowerDAQ can also stream the raw data to the disk without dropping a bit as long as your disk has room. Better yet, you can stream high-speed data from as many as four boards all at the same time, without losing a single sample. We’ve achieved this feat thanks to our unique DSP-based PCI-bus interface as well as our optimized hardware designs, firmware and driver innovations.
Multiboard Interrupt Sharing
Even with today’s systems, interrupts are a scarce commodity. In theory, any board designed to adhere closely to the PCI specs and supplied with a properly written Windows NT driver can share system interrupts with any other PCI-bus boards. In practice, though, you’d be surprised at the number of vendors who warn against sharing interrupts among their boards. UEI isn’t one of them – we’ve designed our hardware and software to support interrupt sharing among multiple PowerDAQ boards and other properly implemented PCI boards on the same motherboard, and we’ve run extensive tests to ensure their proper operation under all conditions.
Preassigned Power-On Output States; Interrupts on Digital Inputs
On PowerDAQ boards, digital outputs always assume a user-defined state when you apply power. This situation is in stark contrast to boards that use low-cost 8255 chips to implement digital I/O; you can’t predict if digital outputs will come up in the High or Low state-an obviously dangerous condition. In addition, eight of our digital inputs feed high-speed edge-detection logic that asserts an interrupt. User code can determine which of the eight lines did so and run the appropriate routine.
Calibration Across All Ranges and Gains
When they calibrate their boards, vendors typically work with only one input range at unity gain; they assume other settings likewise meet spec. Other vendors calibrate products only at the component level. At UEI we start by using NIST-traceable equipment to calibrate our boards as complete systems, accounting for every portion of the analog signal path including interface cables. There’s no twiddling of pots because the boards employ onboard DACs whose calibration values reside in an onboard EEPROM. Finally, each board ships with a Calibration Certificate that attests that it’s passed an examination of each I/O subsystem on every channel and every gain/range.
Counter/Timers Always Available to Users, Easy to Program
Data-acq board designers typically use an 82C54 or some derivative to supply the counter/timers necessary to pace analog or digital I/O operations. Sometimes these counter/timers are dedicated to these I/O operations and are not available to the user. Or, maybe the user must choose between using them as counters or to run analog I/O or digital I/O. No such limitations exist on PowerDAQ family boards; the DSP timers handle all I/O pacing, so the onboard 82C54 is always dedicated exclusively to user applications. Programming the three counter/timers is also far easier. Most boards simply bring out lines that connect to the counter/timers’ control signals and output, and you have to hardwire them to signal sources and destinations. Instead, we provide a matrix switch that allows you to configure these signals completely under software control. For the clock input you can select a software strobe, internal hardware clock, a cascaded signal from another counter or an external source. You can also set the gate either from software or an external signal, and you can also read the device’s output through software. Additionally, each of the three counters can generate an interrupt on terminal count.
Extensive Triggering and Clocking
Nobody in the industry offers a wider variety of triggering and clocking capabilities, which we’ve implemented in the custom system timing/control logic. PowerDAQ boards feature two clocks: the first, a sample or pacer clock, starts individual conversions; the second, a channel-list or burst clock, initiates passes through the channel/gain list. Either can run from an internal hardware or software source as well as an external trigger line, using either rising or falling edges. We supply a separate input line for each of these two clocking signals. High-speed digital circuitry virtually eliminates aperture delay. You can also synchronize multiple cards in the same chassis or in separate PCs to the same clocks. Finally, we offer hardware-based synchronization between the burst clock and the I/O subsystems. Thus you can implement a stimulus/response setup with a predictable latency, a feat impossible when coordinating these two activities through software under Windows. Together, these two clocks allow you to acquire data from a number of channels with one time period between them, and then wait a different time period before doing it all over again. This implements burst mode with both programmable conversion rate and a programmable burst rate.