Instantly download Linux software and drivers for PowerDNA/DNR hardware from UEI.
Version 188.8.131.52 now available!
Introduced in 184.108.40.206:
- Support for rugged military style DNA-MIL and DNR-MIL
- Support for I/O layers AI-248, AO-318, AO-364, DIO-449 and DIO-463
- New "Asynchronous VMAP" operating mode
Introduced in 220.127.116.11:
- AI-222 suport
- Enhanced AI-212 support
- AI-201 timestamp channel
- Added AI-222, AI-248 and DIO-449 examples
- Various enhancements and bug fixes
What's new in 18.104.22.168:
- Improved IRIG-650 timestamps
- Bugfixes to DNX-AI-201, 207/208 settling time parameter and 224 ACB
- Improved DNcx-AI-201/217 timestamp, AI-218 DIO write, and 212
- Improved support for DNx-AI-364
- Improvements to DNx-AI-403 async edge detection and 449
- Bugfixes to 448 ACB and setlevels and improvement of aggregate rate
- Bugfixes to CAN-503 Williamsburg library
- Bugfixes to 601 PWM, 604 messaging mode
- Bugfixes to MIL-1553, improvements, and new samples
Introduced in 22.214.171.124:
- Full support for AI-212, AI-218 and AI-228
- Preliminary support for AO-364
- Bug fixes
Changes made in 126.96.36.199:
- Run serial ports in immediate mode
- Range checking
Changes made in 188.8.131.52:
- [Fixed] - Spurious timeout when running multiple cubes in ACB mode
- [Fixed] - AI-224 calibration and ACB
Changes made in 184.108.40.206:
- SL-504 - Support added for new SL-604 layer
- CT-601 - Implemented new Timed Period Pulse Measurement mode (TPPM)
- AI-217 - Set correct default gain value.
- DIO-401_4_5_6 - Implemented asynchronous events upon edge detection on input lines.
- DIO-448 - Fix macro for single ended channels
- assignment of FIFO function for 1553-708 option changed so if one
1553-708 is in the system the functions will not be changed globally and
affect all 1553 in the system
- AI-255 - number of DC/DC required
was calculated based on V while these DC/DC produce +/-V. This way we
had excessive voltage on the op amps rails and dissipated it as waste
heat. The voltage level to use extra DC/DC are converted into Vpp
voltage in uV.
- ARINC-429-566 - DQ_VMAP_RQSIZE_SZ processing is added to read_fifo_566() and write_fifo_566()
- Debug log wraparound and position reporting is added
- SL-508 - fix to allow 29.5Mhz baseclock for -892 option.
very old bug that prevents allocating the same DMAP more than 256
times. (This would happen for example when alternately
creating/destroying two different DMAPS.)
- SL-508: fixed baud rate error that was prevalent at higher baud rates
- AI-217: code to accommodate the needs of UEI's calibration department. No functional difference to the user.
- changed the default data filtering for pt-pt and DMAP modes to be in a more useful range.
- MIL-1553: EV553_RT_CUST_LUT us implemented in drv_553.c for advanced 1553 customers
pSL553CUST_LUT job for advanced 1553 customers - replace TX data of
RT/SA upon receiving a predefined set of words in RX area
- ARINC-708: BE and IFF printing is added
- Big-endian/low-endian switch is added for TX and RX of ARINC-708 implementation.
- SL-501/508: Implemented new mode that allows setting the parity bit independently on each byte sent over serial port.
- ...and additional bug fixes
Changes made since PowerDNA 220.127.116.11
- Support for 64 bits editions of Windows XP/Vista/7
- Full support for new layer AO-358
- Full support for new layer 1553-553 (MIL-1553)
- Full support for new layer PC-91x.
- New asynchronous operating mode.
Changes made since PowerDNA 18.104.22.168
- Change ARP to prohibit packet queuing
- Filter out broadcast UPD packets (i.e. NetBios)
- Keep buffer allocated until IOCTL task finishes processing it
- Insert check for correct format of IOCTL packets
- Properly free packets on IOCTLR re-request
- Increased pbuff size to avoid double allocations network buffer
Changes made since PowerDNA 22.214.171.124
- Add AO regeneration for L3
Changes made since PowerDNA 126.96.36.199
- [Fixed] - DIO-404 ACB write
Changes made since PowerDNA 188.8.131.52
- [Fixed] - AI-211 PtByPt UeiDaqStopSession.vi doesn't close session
- [Fixed] - time stamp reset issue in mpc5200 Ethernet firmware
- [Fixed] - Add CPU logic revision to devtbl -l and HW Info Build completed:
- [Fixed] - Add firmware build number to HW info
Changes made since PowerDNA 184.108.40.206
- AO-308/332/333 DIO-4xx had a glitch on the output because of the bad MTU controller settings.
4-wire external excitation mode ratiometric measurement fixed - use
(signed)Sa/(signed)Sb provides proper position reading
- Reset function is changed for 8347 build to allow proper reset of the rack
- 201, 202, 207, 208 - timestamp fixed that there is no longer a need to use all channels for the timestamp to work properly
- 403 - allow input and output to work in ACB mode simultaneously on the same channel
- 566 - always returns even number of words from the layer if timestamp is enabled
- 503 - reset changed to avoid inserting errors into the CAN bus upon chip reset
- 205 - 801 option added (+/-4V without input divider)
- Event is added to output CAN thread to prevent priority inversion situation with free-running thread.
- For AO-3xx layers, SS0OUT is now used as the subsystem for writing output values