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PowerDNA Windows drivers and software, includes UEIDAQ Framework library

PowerDNA SW

Features

PowerDNA drivers and software, includes UEIDAQ Framework library

  • Supports Cube and RACKtangle chassis
  • Drivers for all Windows programming languages
  • LabVIEW and MATLAB drivers
  • ActiveX / OPC interface
  • Built-in hardware simulator
  • Includes TenAsys INtime driver

Instantly download. No purchase necessary; however, Add to Cart and Check Out are required for download. If you are looking for PowerDAQ drivers, please click here.

PowerDNA Windows drivers and software, includes UEIDAQ Framework library
Software/Programming: How UEI solutions are used. Hosted - Connected to a PC with Windows, Linux, QNX, VxWorks, RTX, or similar OS. Hosted also is for OPC-UA, Modbus and EtherCAT. Standalone - Controller with Linux or VxWorks OS, Simulink I/O Target or UEILogger. Available options for this product are shown in the drop down menu.
Quantity: $0

Instantly download Windows software and drivers for PowerDNA/DNR hardware from UEI. Includes UEIDAQ Framework library, which includes support for the following:

  • VisualBASIC 6
  • VB.NET
  • LabVIEW
  • MATLAB
  • LabWindows/CVI
  • OPC Server
  • Excel
  • .NET
  • C#
  • C/C++
  • Borland Delphi
  • Borland C++ Builder
  • INtime
  • ActiveX



What's new in 4.8.0.18:

  • Support for rugged military style DNA-MIL and DNR-MIL
  • Framework support for Visual Studio 2013
  • Support for I/O layers AI-248, AO-318, AO-364, DIO-449 and DIO-463
  • New "Asynchronous VMAP" operating mode

Introduced in 4.6.0.41:

  • AI-222 suport
  • Enhanced AI-212 support
  • AI-201 timestamp channel
  • Added AI-222, AI-248 and DIO-449 examples
  • Various enhancements and bug fixes

Introduced in 4.6.0.12:

  • Improved IRIG-650 timestamps
  • Bugfixes to DNX-AI-201, 207/208 settling time parameter and 224 ACB
  • Improved DNcx-AI-201/217 timestamp, AI-218 DIO write, and 212
  • Improved support for DNx-AI-364
  • Improvements to DNx-AI-403 async edge detection and 449
  • Bugfixes to 448 ACB and setlevels and improvement of aggregate rate
  • Bugfixes to CAN-503 Williamsburg library
  • Bugfixes to 601 PWM, 604 messaging mode
  • Bugfixes to MIL-1553, improvements, and new samples

Introduced in 4.6.0.4:

  • Full support for AI-212, AI-218 and AI-228
  • Preliminary support for AO-364
  • Bug fixes

Changes made in 4.4.0.38:

  • Run serial ports in immediate mode
  • Range checking

Changes made in 4.4.0.12:

  • [Fixed] - Spurious timeout when running multiple cubes in ACB mode
  • [Fixed] - AI-224 calibration and ACB

Changes made in 4.2.0.5:

  • SL-504 - Support added for new SL-604 layer
  • CT-601 - Implemented new Timed Period Pulse Measurement mode (TPPM)
  • AI-217 - Set correct default gain value.
  • DIO-401_4_5_6 - Implemented asynchronous events upon edge detection on input lines.
  • DIO-448 - Fix macro for single ended channels
  • 1553-708 - assignment of FIFO function for 1553-708 option changed so if one 1553-708 is in the system the functions will not be changed globally and affect all 1553 in the system
  • AI-255 - number of DC/DC required was calculated based on V while these DC/DC produce +/-V. This way we had excessive voltage on the op amps rails and dissipated it as waste heat. The voltage level to use extra DC/DC are converted into Vpp voltage in uV.
  • ARINC-429-566 - DQ_VMAP_RQSIZE_SZ processing is added to read_fifo_566() and write_fifo_566()
  • Debug log wraparound and position reporting is added
  • SL-508 - fix to allow 29.5Mhz baseclock for -892 option.
  • Fixed very old bug that prevents allocating the same DMAP more than 256 times. (This would happen for example when alternately creating/destroying two different DMAPS.)
  • SL-508: fixed baud rate error that was prevalent at higher baud rates
  • AI-217: code to accommodate the needs of UEI's calibration department. No functional difference to the user.
  • changed the default data filtering for pt-pt and DMAP modes to be in a more useful range.
  • MIL-1553: EV553_RT_CUST_LUT us implemented in drv_553.c for advanced 1553 customers
  • Custom pSL553CUST_LUT job for advanced 1553 customers - replace TX data of RT/SA upon receiving a predefined set of words in RX area
  • ARINC-708: BE and IFF printing is added
  • Big-endian/low-endian switch is added for TX and RX of ARINC-708 implementation.
  • SL-501/508: Implemented new mode that allows setting the parity bit independently on each byte sent over serial port.
  • ...and additional bug fixes

Changes made since PowerDNA 3.8.0.59

  • Support for 64 bits editions of Windows XP/Vista/7
  • Full support for new layer AO-358
  • Full support for new layer 1553-553 (MIL-1553)
  • Full support for new layer PC-91x.
  • New asynchronous operating mode.

Changes made since PowerDNA 3.8.0.55

  • Change ARP to prohibit packet queuing
  • Filter out broadcast UPD packets (i.e. NetBios)
  • Keep buffer allocated until IOCTL task finishes processing it
  • Insert check for correct format of IOCTL packets
  • Properly free packets on IOCTLR re-request
  • Increased pbuff size to avoid double allocations network buffer

Changes made since PowerDNA 3.8.0.53

  • Add AO regeneration for L3

Changes made since PowerDNA 3.8.0.30

  • [Fixed] - DIO-404 ACB write

Changes made since PowerDNA 3.8.0.26

  • [Fixed] - AI-211 PtByPt UeiDaqStopSession.vi doesn't close session
  • [Fixed] - time stamp reset issue in mpc5200 Ethernet firmware
  • [Fixed] - Add CPU logic revision to devtbl -l and HW Info Build completed:
  • [Fixed] - Add firmware build number to HW info

Changes made since PowerDNA 3.8.0.19

  • AO-308/332/333 DIO-4xx had a glitch on the output because of the bad MTU controller settings.
  • AI-254 4-wire external excitation mode ratiometric measurement fixed - use (signed)Sa/(signed)Sb provides proper position reading
  • Reset function is changed for 8347 build to allow proper reset of the rack
  • 201, 202, 207, 208 - timestamp fixed that there is no longer a need to use all channels for the timestamp to work properly
  • 403 - allow input and output to work in ACB mode simultaneously on the same channel
  • 566 - always returns even number of words from the layer if timestamp is enabled
  • 503 - reset changed to avoid inserting errors into the CAN bus upon chip reset
  • 205 - 801 option added (+/-4V without input divider)
  • Event is added to output CAN thread to prevent priority inversion situation with free-running thread.
  • For AO-3xx layers, SS0OUT is now used as the subsystem for writing output values

Compatibility

  • PowerDNA

Related Media

 

How to Install PowerDNA with Windows | UEI Minute Video

UEI PowerDNA (Distributed Networked Automation) hardware is supported by many the popular operating systems; Windows, Windows with Real Time Extensions, QNX, VxWorks and Linux. In this video, we demonstrate how to install PowerDNA for Windows.

 

PowerDNA Framework API vs PowerDNA C/C++ API | UEI Minute Video

Before you start your data acquisition, you need to choose an application or programming language. This video presents your options and explains the differences with each.

 

Updating PowerDNA Firmware | UEI Minute Video

At some point you may need to update the firmware on your PowerDNA cube or rack. We’ve put together this simple guide to walk you through the steps.

 

Modifying PowerDNA Parameters | UEI Minute Video

Before you start your data acquisition using PowerDNA Explorer, you need to configure the parameters of your UEI I/O board. In this short video we show you how.

 

Set Up PowerDNA Explorer | UEI Minute Video

A number of UEI products come with a software application called PowerDNA (Distributed Network Automation) Explorer. In this video we show you how to quickly set it up to scan IP addresses to locate your UEI cube or rack.

 

PowerDNA Explorer: Configuring and Exercising Your UEI Hardware

PowerDNA Explorer is a configuration, diagnostic, and debugging utility that provides read/write access to UEI's I/O boards.