UEIDAQ Framework library uses the same API to access any devices from PowerDNA Distributed Ethernet I/O families. Using UEIDAQ Framework library dramatically cuts the amount of code needed to perform data acquisition and control tasks. UEI supports all 32/64 bit versions of Windows up to the most current Windows 11.
The UEIDAQ Framework provides a set of C++ classes to easily interface your C++ programs with UEI data acquisition devices. The UEIDAQ Framework also comes with an ANSI-C API.
Instantly download Windows software and drivers for PowerDNA/DNR hardware from UEI. Includes UEIDAQ Framework library, which includes support for the following:
- VisualBASIC 6
- VB.NET
- LabVIEW
- MATLAB
- LabWindows/CVI
- OPC Server
- Excel
- .NET
- C#
- C/C++
- Borland Delphi
- Borland C++ Builder
- INtime
- ActiveX
- Python
What's new in Version 5.2.0.18
- Added functionality for ability to set different filter settings for 1553 RT and BM in Python
- Added the ability to reset timestamps on multiple boards
- Fixed a bug when using Buffered Mode in LabView that resulted in a timeout error
- Added the ability to route 1PPS clock to DIO-448 and DIO-449
- Fixed a ISR Overrun Error in UEISIM with a Solo X CPU
- Added new Python Examples for PTP synchronization and Digital PTP
- Added functionality for the SL-514, increasing word size to 128 bits for boards with logic version 02.15.AE+
- Fixed a bug in PowerDNA Explorer when the soft-start and soft-stop functionality on the DIO-433 was swapped
- Added better error handling for DqRtDmapStart
- Added better ACB error checking for the DIO-449
- Added functionality to allow counter register enable with QUAD-604 RtDmap
- Added software support for a new layer, the PC-910-805
- Updated various documentation updates to reflect the software changes above
- Refactored and updated various LabVIEW samples
Added in Version 5.2.0.17
- Fix for cosmetic issue of LEDs on the 8347 CPU
Added in Version 5.2.0.17
- Added functionality for ability to set different filter settings for 1553 RT and BM in Python
- Added the ability to reset timestamps on multiple boards
- Fixed a bug when using Buffered Mode in LabView that resulted in a timeout error
- Added the ability to route 1PPS clock to DIO-448 and DIO-449
- Fixed a ISR Overrun Error in UEISIM with a Solo X CPU
- Added new Python Examples for PTP synchronization and Digital PTP
- Added functionality for the SL-514, increasing word size to 128 bits for boards with logic version 02.15.AE+
- Fixed a bug in PowerDNA Explorer when the soft-start and soft-stop functionality on the DIO-433 was swapped
- Added better error handling for DqRtDmapStart
- Added better ACB error checking for the DIO-449
- Added functionality to allow counter register enable with QUAD-604 RtDmap
- Added software support for a new layer, the PC-910-805
- Updated various documentation updates to reflect the software changes above
- Refactored and updated various LabVIEW samples
Added in Version 5.2.0.16
- Fixes for intermittent issues with Zynq CPUs (NIC2, USB, NVMe, and bus timing issue)
- Added functionality for the red LED of the Zynq CPU to blink if BUFFER-F not working
- Fixed a memory corruption issue with DqAdv448ReadADC. DQL_CHAN448_GNDPIN is now written to directly and does not get included in bData array
- Added functionality for SampleDiagnostic to run on Zynq and Intel using new MODID_FF defines
- Fixed a issue with Heartbeat entry not being the correct CQ position. This issue requires the device to be sending data and a previous run not closing out correctly, causing a leaked CQ entry during DqCmdEchoBELE
- Fixed the return value for an error case in calling DqAdv501GetTxFIFOCount and providing a channel number out of range
- Fixed bug with the Python Serial WriteInt16 interface
- In Framework function WriteMessage501, return after calling DqAdv501SendBreak to avoid sending the break duration as data
- Added ARINC664 to VISTAS
- Upgraded versions of third party plugins used in PowerDNA Explorer
- Added UEIPAC Utils to the UEIPAC Examples folder that is installed during PowerDNA installation
- Fixed a typo in the installer
- Fixed a bug causing UEI Serial Server to not be include in the Linux folder
- Added Modbus Support for RTD-388 and MF-102
- Fixed AO-364 RtDmap not working in Framework
- Updated Python struct member for RT Tx event
Added in Version 5.2.0.15
- Fixed a bug in reading the isolated side logic for the AI-205
- Added WriteBlocking for serial sessions in Framework API
- Fixed maximum size of buffer when running SL cards in messaging mode
- Added low-level APIs: DqAdv501GetInternalTxCount, DqAdv501ResetInternalTxCount, and DqAdv501GetTxFIFOCount
- Added/Fixed support for 602-808
- Fixed a bug involving multiple processes trying to use the DqeAllocSocket function at the same time
- Fixed EV553_BUS_ERROR interrupt clearing
- Fixed a bug in data returned from EV553_RX
- Fixed a bug in Python 1553 RT support for using RT 16 and up
- Added ability to Framework API to set base clock on SL-501/508/508-892
- Fixed a bug where processes could hang on UeiSync1PPSTriggerOnNextPPSBroadCast
- Fixed a bug where MF-101 Analog Input C# code would throw errors in 32-bit compilations
- Added support for ReadEdgeDetectData in Python for Framework API
- Added support RTDMAP support for VR-608
- Fixed a bug with broken AOCurrent session AutoStart
- Fixed a bug with AI-204 data remaining static due to truncation in ChkOpsMode
- Added x86_64 support
- Added DLE support
- Added Initialization and Shutdown Parameters to DIO-480
- Added DIO-480 Readback functions for Output Mode, Termination, and TTL Output Config
- Added MF-101 and MF-102 Readback functions for Termination
- Added Readback functionality for Fan RPM in DqAdvDnxpRead
- Added 501 Support with new functions: DqAdv501HdTxReleaseDelay, DqAdv501SetHdRxEnableDelay, DqAdv501CalculateHdDelay
- Added Sample for RTDMap for AO-358
- Added Samples for UEIPAC
- Fixed bug where it was possible to sleep when the tcpip thread tries to receive an Ethernet packet
- Added/Fixed Async support for 1553 and DIO-449 in Python
- Fixed a bug where the send/receive threads were not done configuring before returning from Start
- Fixed a bug where DIO-403 Periodic Events would return all 0s
- Fixed a bug where 1553 data was being overwritten
- PowerDNA Explorer Changes
- Fixed a bug with initialization values for DIO-449 not being displayed on start up
- Updated a warning message for AO table model on first reads
- Added warning pop up for system safety on MF-101, MF-102, and DIO-480
- Added ability to change IP2
- Removed limiting on parity for 429-566
- Fixed a bug with SL-514 Gray Encoding values not being sent properly
- Updated thumbnails and display pictures for Solo-X and Zync units
- Fixed support for QUAD-604
- Fixed spiking on various channels for DIO-448
- Fixed initialization values not being used at start up for DIO-403
- Combined DI and DO panels into one single DIO panel for MF-101, MF-102, and DIO-480
- Added custom baud rate and base clock selection for SL-501/508/508-892/CSDB-509
- Added support for initialization and shutdown configurations for MF-101, MF-102, and DIO-480
- Added pull up and pull down resistor functionality to MF-101
- Added readback functionality for MF-102
Added in Version 5.2.0.12
- New Features:
- Added support for PC-911-828, AO-318-210, and DNR-MIL-4
- Added support for VR-608 DI channels in iDDS
- Updated LabVIEW Docs
- Added support for DTLS
- Introduced license strings
- Added ability to read TSN settings and status
- Bug Fixes:
- Fixed bug that prevented SL-501 and 1553 sessions from running at the same time
- Fixed bug that kept multiple AO-308s from synching
- Added ability to change DMM-261 measurement mode on the fly
- Fixed error in how ARINC-664 handled fragmented packets
- Fixed CT-601 bin counting mode for rtdmap
- AO-364 added RTDMAP support
View Changelog Archive
