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2-Channel AFDX / ARINC-664 interface

DNx-AFDX-664, DNA-AFDX-664, DNR-AFDX-664, DNF-AFDX-664

Features

2-Channel AFDX/ARINC-664 Interface

  • For use in “Cube" I/O chassis
  • 2 independent or 1 dual redundant channels
  • 10/100/1000 Base-T implementation
  • Transmit, Receive or Bus Monitor function
  • Consecutive or user defined sequence Numbers
  • 10 µS, 1 µS and 100 nS time tags
  • Error detection and injection
  • Extensive filtering and traffic scheduling
  • Includes support for Boeing EDE protocol
2-Channel AFDX / ARINC-664 interface
Product Style: What do the "DNx" prefixes mean? "DNA" prefix is for a Cube & MIL Cube Board, "DNR" prefix is for a Rack & MIL Rack Board , and "DNF" prefix is for a FLATRACK board.
Software/Programming: How UEI solutions are used. Hosted - Connected to a PC with Windows, Linux, QNX, VxWorks, RTX, or similar OS. Hosted also is for OPC-UA, Modbus and EtherCAT. Standalone - Controller with Linux or VxWorks OS, Simulink I/O Target or UEILogger. Available options for this product are shown in the drop down menu.
Quantity: $5500
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Typically in stock for 1-2 week delivery.

The DNx-AFDX-664 is a 2 channel AFDX/ARINC 664 (including the Boeing EDE protocol) communications interface. The board may be configured as two independent channels or one dual redundant channel. The network implementation fully supports 10, 100 and 1000 BASE-T speeds. The channels may operate as a receiver, transmitter or network/bus monitor.

In input mode, the user may time tag inputs with resolutions as low as 10 microseconds. The input automatically provides error/integrity checking, though this feature may be disabled if the application requires. Receive filtering is also supported based on the VL, Port and error detection.

The Monitor mode allows the user to capture all network traffic, or may be set with automatic filtering so only the desired information is captured. The Monitor mode will also gather a variety of statistics from the bus/network. If desired, the monitor mode may be set to capture all UDP network traffic, regardless of whether it is configured based on the AFDX/664 protocol.

Transmit channels automatically configure traffic shape via Bandwidth Allocation Gaps (BAG) with 1, 2, 4, 8, 16, 32, 64 or 128 mS timing. Transmission may be based on an automatic scheduler, or in a one-shot asynchronous mode. Both Uni-cast and Multicast VLs are fully supported. The board is designed to inject various errors if desired, including logical, timing and AFDX protocol errors. The transmitter will generate consecutive Sequence Numbers or they may be user-defined.

Downloads

Compatibility

  • PowerDNA
  • UEIPAC

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